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| HCS138T Data Sheet July 1999 File Number 4614.1 Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer Intersil`s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The Intersil HCS138T is a Radiation Hardened 3-to-8 Line Decoder/Demultiplexer. The outputs are active in the low state. Two active low and one active high enables (E1, E2, E3) are provided. If the device is enabled, the binary inputs (A0, A1, A2) determine which one of the eight normally high outputs will go to a low logic level. Features * QML Class T, Per MIL-PRF-38535 * Radiation Performance - Gamma Dose () 1 x 105 RAD(Si) - Latch-Up Free Under Any Conditions - SEP Effective LET No Upsets: >100 MEV-cm2/mg - Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) * 3 Micron Radiation Hardened SOS CMOS * Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the HCS138T are contained in SMD 5962-95727. A "hot-link" is provided from our website for downloading. www.intersil.com/spacedefense/newsafclasst.asp Intersil`s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/spacedefense/newsafclasst.asp * Input Logic Levels - VIL = 0.3 VCC Max - VIH = 0.7 VCC Min * Input Current Levels Ii 5mA at VOL, VOH Pinouts HCS138DTR (SBDIP), CDIP2-T16 TOP VIEW A0 A1 A2 E1 1 2 3 4 5 6 7 8 16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Ordering Information ORDERING NUMBER 5962R9572701TEC 5962R9572701TXC PART NUMBER HCS138DTR HCS138KTR TEMP. RANGE (oC) -55 to 125 -55 to 125 E2 E3 Y7 GND HCS138KTR (FLATPACK), CDFP4-F16 TOP VIEW A0 A1 A2 E1 E2 E3 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 NOTE: Minimum order quantity for -T is 150 units through distribution, or 450 units direct. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 Satellite Applications FlowTM (SAF) is a trademark of Intersil Corporation. HCS138T Functional Diagram 1 A0 15 Y0 14 2 A1 13 Y2 3 A2 11 Y4 4 E1 5 E2 6 E3 10 Y5 9 Y6 7 Y7 12 Y3 Y1 TRUTH TABLE INPUTS ENABLE E3 X L X H H H H H H H H E2 X X H L L L L L L L L E1 H X X L L L L L L L L A2 X X X L L L L H H H H A1 X X X L L H H L L H H A0 X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H OUTPUTS Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L H = High Level, L = Low Level, X = Don't Care 2 HCS138T Die Characteristics DIE DIMENSIONS: (2159m x 2565m x 533m 51m) 85 x 101 x 21mils 2mil METALLIZATION: Type: Al Si Thickness: 11.0kA 1kA SUBSTRATE POTENTIAL: Unbiased Silicon on Sapphire BACKSIDE FINISH: Sapphire PASSIVATION: Type: Silox (SiO2) Thickness: 13.0kA 2.6kA WORST CASE CURRENT DENSITY: < 2.0e5 A/cm2 TRANSISTOR COUNT: 264 PROCESS: CMOS SOS Metallization Mask Layout HCS138T A1 (2) A0 (1) VCC (16) Y0 (15) A2 (3) (14) Y1 NC NC (13) Y2 E1 (4) E2 (5) (12) Y3 E3 (6) (11) Y4 NC NC (7) Y7 (8) GND (9) Y6 (10) Y5 NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCS138 is TA14361A. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3 |
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